Integrated circuits are made up of millions of active devices formed in or on a silicon substrate. The active devices, which are initially isolated from one another, are united to form functional circuits and components. The devices are interconnected through the use of well-known multilevel interconnections. Interconnection structures normally have a first layer of metallization, an interconnection layer, a second level of metallization, and sometimes a third and subsequent levels of metallization. Interlevel dielectrics such as doped and undoped silicon dioxide (SiO2), are used to electrically isolate the different levels of metallization in a silicon substrate or well.
In a typical chemical mechanical polishing process, the substrate is placed in direct contact with a rotating polishing pad. A carrier applies pressure against the backside of the substrate. During the polishing process, the pad and table are rotated while a downward force is maintained against the substrate back. An abrasive and chemically reactive solution, commonly referred to as slurry is provided to the wafer/pad interface. Polishing is continued in this manner until the desired film on the insulator is removed.
The slurry can be tailored to provide effective polishing to metal layers at desired polishing rates while minimizing surface imperfections, defects, corrosion, and erosion. Furthermore, the polishing slurry may be used to provide controlled polishing selectivities to other thin-film materials used in current integrated circuit technology such as titanium, titanium nitride and the like.